Formal Verification Engineer Applying LLMs for Chip Design

Company: ChipStack
Location: San Jose
Posted on: February 18, 2026

Job Description:

Job Description Job Description About Us Chips are at the center of today's tech-driven world. But how we design them has not changed in decades, while their complexity and specialization have skyrocketed due to increasing performance demands from applications like AI. We want to change that. Our team is small, technical, and fast-moving. We’ve built and shipped at the intersection of AI, EDA, and systems software, with deep roots at companies like Qualcomm, Nvidia, Google, Meta, and the Allen Institute for AI. We’re backed by top investors including Khosla Ventures, Cerberus, and Clear Ventures, and already deployed with 10 innovative customers—from Fortune 100s to cutting-edge AI silicon startups. About This Role We are looking for an experienced Formal Verification Engineer to join our dynamic team. Ideal candidate has experience with all aspects of Formal Verification — SVA, Property Verification, Formal Methods/Abstractions, Methodology and scripting. You will work on developing Chipstack’s Revolutionary Formal Verification Agent , directly impacting the tool quality and features. You will work alongside highly experienced chip designers who have built complex chips, ML scientists who have trained LLMs at scale, and top-notch infrastructure and software engineers. You will leverage your experience in Formal Verification to build the next generation of AI-enabled Verification tools. Key Responsibilities: Collaborate with ML and software teams to develop advanced, AI-driven chip design / Formal Verification solutions. Learn from and work closely with strong ML leads to understand and implement cutting-edge technologies in chip design. Engage directly with customer projects, applying your expertise to develop practical and innovative solutions. Contribute to the integration of LLM technologies into the chip design process, enhancing design efficiency and performance. Stay updated with the latest advancements in chip design and AI/ML technologies to continually improve methodologies and solutions. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Strong experience in Formal Verification. You have implemented complex Formal Verification testbenches using Formal Methods. Proficient in SVA and SystemVerilog. Experience with industry standard tools (JasperGold, VCFormal, Verdi) Solid programming skills (e.g., Python, C/C++, Verilog, SystemVerilog). Experience or interest in AI/ML technologies, especially in the context of LLMs, is highly desirable. Strong problem-solving abilities and a proactive attitude toward learning and innovation. Excellent communication skills and the ability to work effectively in a team-oriented environment. You are self-motivated and driven. You are not afraid of difficult problems and enjoy venturing into areas you have not explored before. Why Join Us? As a young startup funded by top VCs in Silicon Valley, this is a unique opportunity that you can’t really get anywhere else: Personal impact — The opportunity to build something from the ground up and define a new product for an industry that is at the core of the modern technological revolution. Access to unique learning opportunities — With the Allen Institute for AI (AI2) as a co-founder, our team gets access to numerous talks by leading AI researchers/paper authors, knowledge sharing amongst the community of hundreds of engineers working for AI2 companies, and much more. As a part of the multi-disciplinary team, you get to interact with people from very different backgrounds (from chip design to AI to software engineers). Founding title — You will be one of our first hires. For the rest of our days, no matter how many thousands of people join after you, you will always have that honor and distinction. Early-stage equity — Early-stage risk comes with early-stage equity for you. And none of us would be here if we didn’t think our company would create tremendous value over time. Benefits — In spite of being an early-stage company, taking care of our team is a priority for us. From health insurance to catered lunches, we continue to add unique benefits.

Keywords: ChipStack, Modesto , Formal Verification Engineer Applying LLMs for Chip Design, Engineering , San Jose, California